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portfolio

publications

FTK AMchip05: an Associative Memory Chip Prototype for Track Reconstruction at Hadron Collider Experiments

Published in European Physical Society Conference on High Energy Physics, 2015

This presentation is about ATLAS FTK track trigger project based on FPGAs and a custom ASIC: the Associative Memory chip (AMchip). The AMchip is a core processor in charge of the real-time pattern recognition stage of the FTK algorithm. It includes Content Addressable Memory with advanced computation logic enabling detection of correlated data patterns (e.g. tracks made of hits) within a sparse dataset at full I/O speed.

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A pattern recognition mezzanine based on Associative Memory and FPGA technology for L1 track triggering at HL-LHC

Published in Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2016

We present the tests of a prototype system (Pattern Recognition Mezzanine) as core of pattern recognition and track fitting for HL-LHC ATLAS and CMS experiments, combining the power of both Associative Memory custom ASIC and modern Field Programmable Gate Array (FPGA) devices.

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Anisotropic Subsurface Scattering Acquisition Through a Light Field Based Apparatus

Published in International Symposium on Electronic Imaging: Imaging Sensors and Systems, 2020

Subsurface scattering gives a distinct look to many everyday objects. We demonstrate a system that can quickly acquire the full anisotropic subsurface scattering for homogeneous materials. Unlike many existing commercial acquisition systems, our system can be assembled from off-the-shelf optical component and 3D printed/cut parts.

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talks

teaching

Teaching experience 1

Undergraduate course, University 1, Department, 2014

This is a description of a teaching experience. You can use markdown like any other post.

Teaching experience 2

Workshop, University 1, Department, 2015

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